A vMOS Soft-Maximum Current Mirror - Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

In this paper, we describe a novel circuit consisting of N + 1 MOS transistors and a single floating gate which computes n soft maximumof N current inputs and reflects the result in the output transistor. An intuitive description of the operation of the circuit is given. Data from a working two-input version of the circuit is presented and discussed. The circuit features a high output voltage swing and an interesting feedback mechanism which cauees its output impedance to be comparable to tha t of a normal MOS transistor despite the fact that the output devicc is a floating-gate transistor. I. I N T R O D U C T I O N Analog VI31 signal processing has come to be the subject of much interest and active research in recent times. [l] In part,icular, the current-mode approach in which q u a tities of interest are represented as currents and voltages play only an incidental role in the operation of the circuit has become the focus of much attention. [a] Arnoiig the plethora of nonlinear operations required to prrforin curreiit-mode signal processing, the maximum function stands out, as being particularly useful. A soft-mazimum function is one which follows the largest input aiid changes ovei in a smooth manncr when the magnitude of two or inore inputs becorric comparable. 'The circuit, preseiited in this paper cornputes a soft--maximum of N current inputs and reiiects tlie rrsult in its outpi:t8. Floating-gate MOS transistors have been used to great advantage in millog VLSI in the capacity of long-icrm noii-\iolatiic information storage devices. The quantity of ch;~rge stored on the gate of thcsc transistors has been elers which are a,dapted so a.s to increase the precision d analog circuits [3, 4. 31 arid as weighl's iii various VLSl implementations of neiiral net>works [C,, '7; 81. H,eccii~ly, n marvelous w i ~ y of using floating-gate MOS transistors was proposed [9] in which multiple "control gates" ca:pacitively couple into the floating gate, establishing its voltage as a weighted sum of the input voltages via a capacitive divider. The channel of the floating-gste transistor then forms a current which is a nonlinear function of the voltage on the floating gate. In [9] these compound devices were dubbed neuron MOS (neuMOS or vMOS ) transistors in view of a loose analogy between the function performed by these devices and by cells in the nervous system. A simple above threshold model is derived in [9] and a number of interesting applications are discussed. A corresponding subthreshold model is developed in [lo]. The soft-maximum current mirror presented in this paper uses a single floating gate with N control gates and N channels beneath it to enforce a competition between the various input currents, the largest of which establishes the voltage on the floating gate. An additional channel beneath the floating gate computes the output current.